1. Field of the Invention
The present invention relates to a structure of a superlattice semiconductor device comprising a plurality of stacked superlattice layers.
2. Description of the Prior Art
FIG. 1 is a diagram showing a schematic structure of a conventional resonant tunneling bipolar device, which is disclosed, for example, in IEEE IEDM Technical Digest, 1986, p. 282, and IEEE IEDM Technical Digest, 1986, p. 286. In FIG. 1, the conventional resonant tunneling bipolar device comprises an n type GaAs semiconductor substrate 6b, a p type GaAs semiconductor layer 3b formed on the GaAs substrate 6b, a first AlAs superlattice layer 4b formed on the p type semiconductor layer 3b, a GaAs superlattice layer 5b formed on the superlattice layer 4b, a second AlAs superlattice layer 4b' formed on the superlattice layer 5b, a p type GaAs semiconductor layer 3b' formed on the superlattice layer 4b', and an n type AlGaAs semiconductor layer 2b' formed on the semiconductor layer 3b'. In this structure, the GaAs superlattice layer 5b defines a well region forming a quantum well, and the AlAs superlattice layers 4b and 4b' formed on the upper and lower surfaces of the superlattice layer 5b function as a barrier region. Each of the GaAs superlattice layer 5b and the AlAs super lattice layers 4b and 4b' has a thickness of about several tens .ANG., and they form a superlattice structure with hetero junction. In this structure, the n type AlGaAs semiconductor layer 2b' is connected to an emitter electrode E, the p type GaAs semiconductor layer 3b is connected to a base electrode B, and the n type GaAs semiconductor substrate 6b is connected to a collecter electrode C.
FIG. 2 is a diagram showing a structure of another conventional superlattice device, that is, showing schematically a cross-sectional structure of a resonant tunneling device (diode) using amorphous silicon. In FIG. 2, the resonant tunneling diode comprises an n type silicon semiconductor substrate 6c, an amorphous silicon layer (referred to as an a-Si:H layer hereinafter) 3c formed on the semiconductor substrate 6c having P type impurities, such as phosphorous, introduced, an amorphous Si.sub.3 N.sub.4 :H superlattice layer 4c formed on the a-Si:H layer 3c, an a-Si:H superlattice layer 5c formed on the superlattice layer 4c having P type impurities introduced, an a-Si.sub.3 N.sub.4 :H superlattice layer 4c' formed on the superlattice layer 5c, and an a-Si:H layer 3c' formed on the superlattice layer 4c' having P type impurities introduced. The p type a-Si:H layer 3c' is connected to an anode electrode A, and the n type silicon semiconductor substrate 6c is connected to a cathode electrode K. In this structure, the a-Si:H superlattice layer 5c having P type impurities introduced defines a well region, and the a-Si.sub.3 N.sub.4 :H superlattice layers 4c and 4c' formed on the upper and lower surfaces thereof define a barrier region. In addition, each of the superlattice layers 4c, 5c has a thickness of about several tens .ANG., and they form a superlattice quantum well structure.
As shown in FIGS. 1 and 2, the conventional superlattice semiconductor device having a superlattice structure has a planar type of structure formed by sequentially stacked layers on the surface of a semiconductor substrate. The stacked layers lie along side of each other. Description is now made on operation of the principle of a resonant tunneling device which is one of the superlattice semiconductor device.
FIG. 3 is a diagram for illustrating the principle of operation of the resonant tunneling device. Referring now to FIG. 3, description is made on the principle of operation of the resonant tunneling device. In FIG. 3, a potential diagram of a diode which is one of the resonant tunneling devices is shown by way of an example. If a semiconductor layer (a well region) having a thickness similar to a de Broglie wavelength of an electron, such as about several nm (nanometers) and a narrow band gap is interposed between semiconductor layers (barrier regions) each having almost the same thickness and a wide band gap, and further semiconductor layers each having a narrow band gap are provided on the opposite sides of the barrier layers, an energy band structure as shown in FIG. 3A is obtained. More specifically, the bottom of the band in the well region is lower than those in barrier regions on both sides, so that a well structure is formed. In such a state, the energy level in the well region interposed between the barriers is quantized. At that time, the discrete energy quantum levels are produced, so that electrons are strongly bound by the quantum levels. In other words, although in the well region, electrons can serve as free electrons in two-dimensional directions, electrons can take only the discontinuous energy levels in the direction of depth (the direction of the depth of a well).
In such a state, voltage is applied between an anode and a cathode as shown in FIG. 3B. When the potential at the cathode becomes equal to a quantum level E1 of the well (V=V.sub.RT1), the resonant tunneling effect is produced, so that electrons can pass through the barrier layers. At that time, the probability of tunneling of electrons is about 1.
Subsequently, a voltage is applied between the anode and the cathode. When the bottom of the conduction band of the cathode reaches a level between the quantum levels E1 and E2 formed in the well region, as shown in FIG. 3C, the tunneling probability of electrons is decreased, so that current flowing through the well region is decreased. so-called negative (differential) resistance is produced.
FIG. 3D is a diagram showing the relation between voltage V applied between the anode and the cathode and current I flowing therebetween. As shown in FIG. 3D, in the resonant tunneling device, when the voltage applied between the anode and the cathode is increased, the value of current flowing therebetween has a crest and a trough. A phenomenon that the negative (differential) resistance is produced due to such a resonant tunneling effect is introduced by L. Esaki et al., in IBM Res. Note, RC-2418, 1969, and IBM, J. Res. Develop., 1970, p. 61.
Application as shown in FIGS. 4 to 7 is proposed as a device utilizing such a resonant tunneling effect.
FIG. 4 is a diagram showing the relation between voltage V.sub.EB applied between a base and an emitter and collector current Ic in a single resonant tunneling bipolar transistor. A single superlattice semiconductor device can form a flip-flop circuit by utilizing a crest and a trough of the Ic-V.sub.EB characteristics. In addition, if and when the resonant tunneling bipolar transistor is used as a transistor in a circuit structure as shown in FIG. 5A, the characteristic of output voltage Your periodically repeating a crest and a trough in response to input voltage Vin as shown in FIG. 5B when the value of the input voltage Vin applied to the base B of the resonant tunneling bipolar transistor A is changed, so that a voltage translator circuit can be formed by a single transistor. Furthermore, when voltages V1 to Vn are applied in parallel to a base B of a resonant bipolar transistor A as shown in FIG. 6, the output voltage Vout is periodically changed in response to the value of voltage applied to an input (the base) of the bipolar transistor A. Therefore, if the input voltages V1 to Vn are used as binary code inputs of "1" and "0", parity bits "1" and "0" can be generated in accordance with the binary code input. As a result, a single superlattice semiconductor device can form a parity bit generator. Additionally, in a circuit structure as shown in FIG. 7A, the collector current Ic is periodically changed in response to voltage V.sub.CE applied between a collector C and an emitter E of the resonant tunneling bipolar transistor A, so that the voltage V.sub.CE between the collector C and the emitter E is latched to one among values of 1 to 3 in response to the value of the input voltage Vin. As a result, a single semiconductor device can form a multivalued memory circuit. The above described circuit structures and characteristics shown in FIGS. 4 to 7 are disclosed in, for example, Journal of Applied Physics, Vol. 58, 1985, p. 1366.
As described in the foregoing, in the conventional superlattice semiconductor device, a single semiconductor device can perform various circuit functions. However, since the structure is of a planar type in which semiconductor layers are stacked in parallel on the surface of a semiconductor substrate, the area of the superlattice semiconductor device is substantially decreased so that current flowing therethrough is substantially decreased in a very large scale integrated circuit, such as a 64 MDRAM, formed in accordance with a design rule of less than about 0.1 .mu.m, and then a negative (differential) resistance phenomenon does not clearly occur. In addition, even if a crest and a trough appear in the current characteristic due to the resonant tunneling effect, the difference between the crest and the trough is so small that the function of switching cannot be sufficiently performed and accordingly malfunction switching tends to occur.